Ask questions and find answers on STM32 microprocessors, including hardware, power, DRAM, flashing, interfacing, device tree, and peripherals.
Hi!I have a custom board with 2GB RAM instead of 4GB RAM. Yes, I have configured 2GB in CubeMX and generated the new DT.Check it out here: https://github.com/DanielMartensson/Watermelon-Wine-1A/tree/linux-testing/watermelon-wine-os%2Flayers%2Fmeta-wa...
Hi, I'm new to yocto project, I'm trying to bitbake core-image-minimal image in yocto in stm32mp157d-dk1(scarthgap) ,by editing the bblayers.conf and local.conf in image, its successfully build and flashed into SD card , but I'm trying to boot devic...
I'm using the mp215 with ddr3l (x16) and an ISSI dram ic that is 8Gb (1 gigabyte) which means it's a dual rank configuration compared to a more typical half gigabyte. As far as im aware all 1GB ddr3 dram ic's are dual rank.In AN5723 6.1 Note it says ...
Hi,I'm using brand-new, unmodified st32mp257f-dk dev board.When using starter package (https://www.st.com/en/embedded-software/stm32mp2starter.html#get-software) flashed onto sdcard according to https://wiki.st.com/stm32mpu/wiki/How_to_populate_the_S...
Hi, Just now I have done bringing up a custom board for STM32MP133/ STM32MP135 with OpenST Linux, with kernel 6.2:- The whole boot chain bring up from tf-a, uboot, kernel.- Configure PMIC and support DDR test.- Support FMC NAND, change flash partitio...
Hi,this one is similar to https://community.st.com/t5/stm32-mcus-products/ioselect-option-in-stm32h563-is-not-working/m-p/681099but not the same. While testing OSPI1 on our MP257 board and our FSBL I found thatMSEL in OCTOSPI1->CR is ignored.CSSEL an...
Is there a Global Exclusive Monitor connected to the M33 and the A35 cores?Any documentation for it?Thank you
We have some devices based on STM32MP257 SoCs that connect to a 100 Mbit Ethernet network via ETH1, where ETH1 is going straight to an RMII PHY. Pins for ETH2 are reserved, but are not used/not connected. Some of our devices work rock-solid as except...
There is official errata named "2.5.6 Indirect write mode limited to 256 Mbytes" where indirect OSPI write requests for addr >256MB are written to invalid target address. I tested the behavior and it seems address is effectively truncated to 28bits. ...
